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Flow Latency Analysis with the Architecture Analysis and Design Language (AADL)

Technical Note
This 2007 report describes the ability of AADL to determine a lower bound for the worst-case end-to-end latency in a system.
Publisher

Software Engineering Institute

CMU/SEI Report Number
CMU/SEI-2007-TN-010
DOI (Digital Object Identifier)
10.1184/R1/6573863.v1

Abstract

Control system components are sensitive to the end-to-end latency and age of signal data. They are also affected by variation (jitter) in latency and age values due to different runtime configurations (i.e., sampling or data-driven signal processing pipelines, dissimilar communication mechanisms, partitioned architectures, and globally synchronous versus asynchronous hardware). This technical note introduces an analysis framework designed to calculate the end-to-end latency and age of signal stream data as well as their jitter. The latency analysis framework and calculations are illustrated in the context of an example model that uses the flow specification notation of the Architecture Analysis & Design Language (AADL). The report describes how this latency analysis capability can be used to determine worst-case end-to-end latency on system models of different fidelity and how it accounts for partitioned architectures. It also summarizes the worst-case end-to-end flow latency analysis capability provided by the Open Source AADL Tool Environment (OSATE) flow latency analysis plug-in.

Cite This Technical Note

Feiler, P., & Hansson, J. (2007, December 1). Flow Latency Analysis with the Architecture Analysis and Design Language (AADL). (Technical Note CMU/SEI-2007-TN-010). Retrieved April 17, 2024, from https://doi.org/10.1184/R1/6573863.v1.

@techreport{feiler_2007,
author={Feiler, Peter and Hansson, Jörgen},
title={Flow Latency Analysis with the Architecture Analysis and Design Language (AADL)},
month={Dec},
year={2007},
number={CMU/SEI-2007-TN-010},
howpublished={Carnegie Mellon University, Software Engineering Institute's Digital Library},
url={https://doi.org/10.1184/R1/6573863.v1},
note={Accessed: 2024-Apr-17}
}

Feiler, Peter, and Jörgen Hansson. "Flow Latency Analysis with the Architecture Analysis and Design Language (AADL)." (CMU/SEI-2007-TN-010). Carnegie Mellon University, Software Engineering Institute's Digital Library. Software Engineering Institute, December 1, 2007. https://doi.org/10.1184/R1/6573863.v1.

P. Feiler, and J. Hansson, "Flow Latency Analysis with the Architecture Analysis and Design Language (AADL)," Carnegie Mellon University, Software Engineering Institute's Digital Library. Software Engineering Institute, Technical Note CMU/SEI-2007-TN-010, 1-Dec-2007 [Online]. Available: https://doi.org/10.1184/R1/6573863.v1. [Accessed: 17-Apr-2024].

Feiler, Peter, and Jörgen Hansson. "Flow Latency Analysis with the Architecture Analysis and Design Language (AADL)." (Technical Note CMU/SEI-2007-TN-010). Carnegie Mellon University, Software Engineering Institute's Digital Library, Software Engineering Institute, 1 Dec. 2007. https://doi.org/10.1184/R1/6573863.v1. Accessed 17 Apr. 2024.

Feiler, Peter; & Hansson, Jörgen. Flow Latency Analysis with the Architecture Analysis and Design Language (AADL). CMU/SEI-2007-TN-010. Software Engineering Institute. 2007. https://doi.org/10.1184/R1/6573863.v1