Poster - Using All Processor Cores While Being Confident about Timing
• Poster
Publisher
Software Engineering Institute
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Abstract
Complex, cyber-physical Department of Defense (DoD) systems, such as aircraft, depend on correct timing to properly and reliably execute crucial sensing, computing, and actuation functions. Any timing failure can have disastrous consequences; a large unexpected delay translating sensor data into actuation can cause system instability and loss of control. What’s more, the complexity of today’s DoD systems has increased the demand for use of multicore processors because unicore chips are either unavailable or not up to the task. However, concerns about timing have led to the practice of disabling all processor cores except one. In this project, CMU SEI researchers describe efforts to develop a solution to overcome this obstacle.
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CMU SEI Research Review 2020 Day 3 Artifacts